TECHNOLOGY

SimplEx Micro List Patents

Explore our granted patents and filed applications across microprocessor and vector processor technologies—powering next-generation computing through innovation and efficiency.

Microprocessor Patents

PATENT #TITLEGRANT DATE
US-11829187-B2Microprocessor with Time Counter for Statically Dispatching Instructions11/28/2023
US-11829767-B2Register Scoreboard for a Microprocessor with a Time Counter for Statically Dispatching Instructions11/28/2023
US-11829762-B2Time-Resource Matrix for a Microprocessor with Time Counter for Statically Dispatching Instructions11/28/2023
US-12190116-B2A Microprocessor with Apparatus and Method for Replaying Instructions1/7/2025
US-12169716-B2Microprocessor with a Time Counter for Statically Dispatching Extended Instructions12/17/2024

Vector Processor Patents

PATENT #TITLEGRANT DATE
US-12106114-B2Microprocessor with Shared Read and Write Buses and Instruction Issuance to Multiple Register Sets in Accordance with a Time Counter10/1/2024
US-12112172-B2Vector Microprocessor with a Time Counter for Statically Dispatching Instructions10/8/2024
US-12124849-B2Vector Microprocessor with Extended Vector Register Sets10/22/2024
US-12288065-B2Microprocessor with Odd and Even Registers4/29/2025
US-12282772-B2Vector Microprocessor with Vector Data Buffer4/22/2025
AllowedMethod and Apparatus for a Scalable Microprocessor with Time Counter6/11/2025

General Patents

PATENT #TITLEGRANT DATE
US-11954491-B2Multi-Threading Microprocessor with a Time Counter for Statically Dispatching Instructions4/9/2024
US-12001848-B2Microprocessor with a Time Counter for Statically Dispatching Instructions with Phantom Registers6/4/2024
US-12141580-B2Microprocessor with Non-Cacheable Memory Load Prediction11/12/2024
US-12147812-B2Out-of-Order Execution of Loop Instruction in a Microprocessor11/19/2024

Filed Patents

PATENT #TITLEGRANT DATE
18/135,481Executing Phantom Loops in a Microprocessor7/13/2022
18/224,002A Microprocessor with Apparatus and Method for Handling of Instructions with Long Throughput3/14/2023
18/237,511A Microprocessor with Apparatus and Method for Replaying Load and Store Instructions3/14/2023
18/388,908Microprocessor with Speculative and In-Order Register Sets11/13/2023
18/603,171Apparatus and Method for Implementing Many Different Loop types in a Microprocessor4/5/2023

RISC-V Areas of Innovation

SCALABILITY

RISC-V processors can scale from low-power, low-performance devices to high-performance computing systems, making it a versatile technology for a range of applications. This scalability is achieved through the modular design of the ISA, which allows for customization and optimization at all levels of the system.

MODULARITY

The RISC-V ISA is modular, which means that it can be customized to meet the needs of different applications and markets. This modularity allows developers to design RISC-V processors that are optimized for specific use cases, such as low-power IoT devices or high-performance computing systems.

EXTENSIBILITY

RISC-V’s extensible ISA enables customers to add their own unique instructions and ‘secret sauce’ to gain a competitive edge over industry rivals, while also future-proofing their technology with the ability to add new features and capabilities over time without requiring changes to the core architecture.

LOW POWER

RISC-V’s simple ISA enables low-power techniques such as multi-level clock-gating and multiple power domains, optimizing processor design for energy efficiency in mobile and IoT devices.

SECURITY

RISC-V processors can incorporate security features at the hardware level, which can help to protect against cyber threats such as hacking and malware. This hardware-level security is achieved through features such as memory protection and encryption, which are integrated into the design of the processor.

FLEXIBILITY

RISC-V’s modular and extensible ISA allows for flexible customization at all levels, enabling configuration to unique designs tailored to various applications and customers.

INTEROPERABILITY

The RISC-V ecosystem is built upon a broad range of companies that belong to the RISC-V international consortium, enabling seamless interoperability with other technologies and systems.

LOW BARIER TO ENTRY

RISC-V’s open-source and scalable design, with its low barrier to entry, makes it an ideal choice for IoT development, encouraging innovation and creating a diverse ecosystem of developers and applications, from hobbyists and startups to industry leaders.

Download Our White Paper on Time-based Microprocessors

In the pursuit of performance, modern microprocessor design has become increasingly complex, often leading to higher power consumption and design challenges. At Simplex Micro, we believe there is a more efficient path forward.

In this white paper, CEO/CTO Dr. Thang Tran details a novel, time-based architecture that utilizes status scheduling to achieve high-performance, out-of-order execution without the overheard of traditional dynamic schedulers.

Discover how this “fire-and-forget” methodology simplifies the pipeline, reduces power consumption, and provides a scalable foundation for next-generation custom and vector processors.

To receive a copy of the full white paper, please complete the form below.