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Engineering insights on TBS and RISC-V.
Technical writing from the team building the architecture.
· Company Update
New Episode: Building the First Vector Processor in Meta's MTIA
Before there was a finalized RISC-V Vector spec, before SimplEx Micro existed, Thang Tran was already building the vector engine that now ships inside Meta's MTIA silicon.
· Engineering Update
Performance Model Complete — Benchmarks Running
Dhrystone, Matrix Multiply, TinyML, and Qwen have all run successfully to completion on the Simplex performance model.
· Engineering Update
Early June Update: Validation Accelerates
The team has moved into deeper verification and benchmark execution — building confidence in both the model and the underlying architecture.
· Engineering Update
Early May Update: Model Completion and First Workloads
The performance model reached a key inflection point this month, with major front-end components now complete and validated.