Most IP vendors show you a performance number. We show you why to trust it.

In Episode 5 of Conversations with the CTO, Dr. Thang Tran walks through how SimplEx Micro validates its performance model against RTL — benchmark by benchmark, from Dhrystone up through TinyML and Qwen 2.5-7B. No aggregate hand-waving: every discrepancy between the model and RTL gets tracked down at the pipeline level before it counts as “correlated.”

We also show the visualizer live — down to the clock cycle, you can see exactly where a branch misprediction or cache miss costs you performance, and how RISC-V vector chaining (not possible in ARM NEON or x86 AVX) recovers it.

Watch the video: Conversation with the CTO Episode 5