We’ve published a double installment of our Conversations with the CTO series on the official Simplex Micro YouTube channel. In these updates, founder and CTO Dr. Thang Tran takes us past the baseline execution milestones to look at the deeper engineering engine: RTL Correlation and Architectural Exploration. Together, these phases prove that our simulation numbers match physical silicon behavior while giving architects the power to seamlessly optimize hardware.
The first half of this deep dive explores the mechanics of RTL correlation. Thang details how the team uses the Dhrystone benchmark to trace and verify the C++ performance model against physical RTL instruction by instruction—monitoring the exact timing for instruction issue, execution, retirement, and register file write-backs. The discussion breaks down how custom scripts isolate performance bottlenecks like branch mispredictions and cache misses, why our 5% error tolerance is significantly more stringent than the 10% industry standard, and how we leverage matrix multiplication to ensure alignment across our Vector Processing Unit (VPU).
The second half transitions from raw verification to active architectural exploration, highlighting the massive workflow advantages of using a C++ model over physical RTL iterations. Instead of waiting days for hardware synthesis runs, designers can reconfigure L1/L2 cache sizes or adjust memory latencies in mere minutes to perfectly isolate the ideal configuration for target workloads. Thang explains how this granularity gives chip architects absolute control over PPA (Performance, Power, and Area)—enabling the physical removal of unneeded logic blocks (such as the floating-point unit) to maximize efficiency for edge AI and portable constraints. Finally, the series provides a look into our visualization tooling, featuring a graphical cycle view that monitors pipeline stalls and data streams before moving to advanced FPGA proof-of-concept prototyping.
Both episodes are now live on the Simplex Micro YouTube channel.
Watch Part 3 (RTL Correlation): https://www.youtube.com/watch?v=mKzM3uFE3M4
Watch Part 4 (Architectural Exploration): https://www.youtube.com/watch?v=Hw9zdQKvwhg


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